Update common_audio
Corresponds to upstream commit 524e9b043e7e86fd72353b987c9d5f6a1ebf83e1 Update notes: * Moved src/ to webrtc/ to easily diff against the third_party/webrtc in the chromium tree * ARM/NEON/MIPS support is not yet hooked up * Tests have not been copied
This commit is contained in:
Arun Raghavan
225
webrtc/common_audio/signal_processing/include/spl_inl_mips.h
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225
webrtc/common_audio/signal_processing/include/spl_inl_mips.h
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/*
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* Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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* tree. An additional intellectual property rights grant can be found
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* in the file PATENTS. All contributing project authors may
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* be found in the AUTHORS file in the root of the source tree.
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*/
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// This header file includes the inline functions in
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// the fix point signal processing library.
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#ifndef WEBRTC_SPL_SPL_INL_MIPS_H_
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#define WEBRTC_SPL_SPL_INL_MIPS_H_
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static __inline int32_t WEBRTC_SPL_MUL_16_16(int32_t a,
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int32_t b) {
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int32_t value32 = 0;
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int32_t a1 = 0, b1 = 0;
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__asm __volatile(
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#if defined(MIPS32_R2_LE)
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"seh %[a1], %[a] \n\t"
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"seh %[b1], %[b] \n\t"
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#else
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"sll %[a1], %[a], 16 \n\t"
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"sll %[b1], %[b], 16 \n\t"
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"sra %[a1], %[a1], 16 \n\t"
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"sra %[b1], %[b1], 16 \n\t"
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#endif
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"mul %[value32], %[a1], %[b1] \n\t"
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: [value32] "=r" (value32), [a1] "=&r" (a1), [b1] "=&r" (b1)
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: [a] "r" (a), [b] "r" (b)
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: "hi", "lo"
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);
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return value32;
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}
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static __inline int32_t WEBRTC_SPL_MUL_16_32_RSFT16(int16_t a,
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int32_t b) {
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int32_t value32 = 0, b1 = 0, b2 = 0;
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int32_t a1 = 0;
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__asm __volatile(
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#if defined(MIPS32_R2_LE)
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"seh %[a1], %[a] \n\t"
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#else
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"sll %[a1], %[a], 16 \n\t"
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"sra %[a1], %[a1], 16 \n\t"
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#endif
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"andi %[b2], %[b], 0xFFFF \n\t"
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"sra %[b1], %[b], 16 \n\t"
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"sra %[b2], %[b2], 1 \n\t"
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"mul %[value32], %[a1], %[b1] \n\t"
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"mul %[b2], %[a1], %[b2] \n\t"
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"addiu %[b2], %[b2], 0x4000 \n\t"
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"sra %[b2], %[b2], 15 \n\t"
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"addu %[value32], %[value32], %[b2] \n\t"
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: [value32] "=&r" (value32), [b1] "=&r" (b1), [b2] "=&r" (b2),
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[a1] "=&r" (a1)
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: [a] "r" (a), [b] "r" (b)
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: "hi", "lo"
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);
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return value32;
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}
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#if defined(MIPS_DSP_R1_LE)
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static __inline int16_t WebRtcSpl_SatW32ToW16(int32_t value32) {
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__asm __volatile(
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"shll_s.w %[value32], %[value32], 16 \n\t"
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"sra %[value32], %[value32], 16 \n\t"
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: [value32] "+r" (value32)
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:
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);
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int16_t out16 = (int16_t)value32;
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return out16;
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}
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static __inline int16_t WebRtcSpl_AddSatW16(int16_t a, int16_t b) {
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int32_t value32 = 0;
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__asm __volatile(
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"addq_s.ph %[value32], %[a], %[b] \n\t"
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: [value32] "=r" (value32)
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: [a] "r" (a), [b] "r" (b)
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);
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return (int16_t)value32;
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}
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static __inline int32_t WebRtcSpl_AddSatW32(int32_t l_var1, int32_t l_var2) {
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int32_t l_sum;
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__asm __volatile(
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"addq_s.w %[l_sum], %[l_var1], %[l_var2] \n\t"
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: [l_sum] "=r" (l_sum)
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: [l_var1] "r" (l_var1), [l_var2] "r" (l_var2)
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);
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return l_sum;
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}
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static __inline int16_t WebRtcSpl_SubSatW16(int16_t var1, int16_t var2) {
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int32_t value32;
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__asm __volatile(
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"subq_s.ph %[value32], %[var1], %[var2] \n\t"
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: [value32] "=r" (value32)
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: [var1] "r" (var1), [var2] "r" (var2)
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);
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return (int16_t)value32;
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}
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static __inline int32_t WebRtcSpl_SubSatW32(int32_t l_var1, int32_t l_var2) {
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int32_t l_diff;
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__asm __volatile(
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"subq_s.w %[l_diff], %[l_var1], %[l_var2] \n\t"
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: [l_diff] "=r" (l_diff)
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: [l_var1] "r" (l_var1), [l_var2] "r" (l_var2)
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);
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return l_diff;
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}
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#endif
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static __inline int16_t WebRtcSpl_GetSizeInBits(uint32_t n) {
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int bits = 0;
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int i32 = 32;
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__asm __volatile(
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"clz %[bits], %[n] \n\t"
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"subu %[bits], %[i32], %[bits] \n\t"
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: [bits] "=&r" (bits)
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: [n] "r" (n), [i32] "r" (i32)
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);
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return (int16_t)bits;
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}
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static __inline int16_t WebRtcSpl_NormW32(int32_t a) {
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int zeros = 0;
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__asm __volatile(
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".set push \n\t"
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".set noreorder \n\t"
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"bnez %[a], 1f \n\t"
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" sra %[zeros], %[a], 31 \n\t"
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"b 2f \n\t"
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" move %[zeros], $zero \n\t"
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"1: \n\t"
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"xor %[zeros], %[a], %[zeros] \n\t"
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"clz %[zeros], %[zeros] \n\t"
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"addiu %[zeros], %[zeros], -1 \n\t"
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"2: \n\t"
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".set pop \n\t"
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: [zeros]"=&r"(zeros)
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: [a] "r" (a)
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);
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return (int16_t)zeros;
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}
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static __inline int16_t WebRtcSpl_NormU32(uint32_t a) {
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int zeros = 0;
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__asm __volatile(
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"clz %[zeros], %[a] \n\t"
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: [zeros] "=r" (zeros)
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: [a] "r" (a)
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);
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return (int16_t)(zeros & 0x1f);
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}
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static __inline int16_t WebRtcSpl_NormW16(int16_t a) {
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int zeros = 0;
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int a0 = a << 16;
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__asm __volatile(
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".set push \n\t"
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".set noreorder \n\t"
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"bnez %[a0], 1f \n\t"
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" sra %[zeros], %[a0], 31 \n\t"
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"b 2f \n\t"
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" move %[zeros], $zero \n\t"
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"1: \n\t"
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"xor %[zeros], %[a0], %[zeros] \n\t"
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"clz %[zeros], %[zeros] \n\t"
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"addiu %[zeros], %[zeros], -1 \n\t"
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"2: \n\t"
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".set pop \n\t"
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: [zeros]"=&r"(zeros)
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: [a0] "r" (a0)
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);
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return (int16_t)zeros;
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}
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static __inline int32_t WebRtc_MulAccumW16(int16_t a,
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int16_t b,
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int32_t c) {
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int32_t res = 0, c1 = 0;
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__asm __volatile(
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#if defined(MIPS32_R2_LE)
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"seh %[a], %[a] \n\t"
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"seh %[b], %[b] \n\t"
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#else
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"sll %[a], %[a], 16 \n\t"
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"sll %[b], %[b], 16 \n\t"
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"sra %[a], %[a], 16 \n\t"
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"sra %[b], %[b], 16 \n\t"
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#endif
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"mul %[res], %[a], %[b] \n\t"
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"addu %[c1], %[c], %[res] \n\t"
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: [c1] "=r" (c1), [res] "=&r" (res)
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: [a] "r" (a), [b] "r" (b), [c] "r" (c)
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: "hi", "lo"
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);
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return (c1);
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}
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#endif // WEBRTC_SPL_SPL_INL_MIPS_H_
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